/**
  ******************************************************************************
  * @file    
  * @author  
  * @version 
  * @date    
  * @brief   
  ******************************************************************************
	* @attention
  *
  * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
  */
  
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __RCC_H
#define __RCC_H

/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#define RCC_OFFSET               (RCC_BASE - PERIPH_BASE)
#define RCC_CR_OFFSET            (RCC_OFFSET + 0x00)
#define RCC_CR_HSION_BIT          0
#define RCC_CR_HSION_BB          (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32) + (RCC_CR_HSION_BIT * 4))

#define RCC_CR_HSIRDY_BIT         1
#define RCC_CR_HSIRDY_BB         (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32) + (RCC_CR_HSIRDY_BIT * 4))

#define RCC_CR_MSION_BIT          8
#define RCC_CR_MSION_BB          (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32) + (RCC_CR_MSION_BIT * 4))

#define RCC_CR_MSIRDY_BIT         9
#define RCC_CR_MSIRDY_BB         (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32) + (RCC_CR_MSIRDY_BIT * 4))

#define RCC_CFGR_OFFSET          (RCC_OFFSET + 0x08)
#define RCC_CFGR_SW0_BIT          0
#define RCC_CFGR_SW0_BB          (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32) + (RCC_CFGR_SW0_BIT * 4))

#define RCC_CFGR_SW1_BIT          1
#define RCC_CFGR_SW1_BB          (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32) + (RCC_CFGR_SW1_BIT * 4))

#define RCC_CFGR_SWS0_BIT         2
#define RCC_CFGR_SWS0_BB         (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32) + (RCC_CFGR_SWS0_BIT * 4))

#define RCC_CFGR_SWS1_BIT         3
#define RCC_CFGR_SWS1_BB         (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32) + (RCC_CFGR_SWS1_BIT * 4))

#define RCC_AHBENR_OFFSET        (RCC_OFFSET + 0x1C)
#define RCC_AHBENR_GPIOAEN_BIT    0
#define RCC_AHBENR_GPIOAEN_BB    (PERIPH_BB_BASE + (RCC_AHBENR_OFFSET * 32) + (RCC_AHBENR_GPIOAEN_BIT * 4))

#define RCC_AHBENR_GPIOBEN_BIT    1
#define RCC_AHBENR_GPIOBEN_BB    (PERIPH_BB_BASE + (RCC_AHBENR_OFFSET * 32) + (RCC_AHBENR_GPIOBEN_BIT * 4))

#define RCC_AHBENR_GPIOCEN_BIT    2
#define RCC_AHBENR_GPIOCEN_BB    (PERIPH_BB_BASE + (RCC_AHBENR_OFFSET * 32) + (RCC_AHBENR_GPIOCEN_BIT * 4))

#define RCC_AHBENR_GPIODEN_BIT    3
#define RCC_AHBENR_GPIODEN_BB    (PERIPH_BB_BASE + (RCC_AHBENR_OFFSET * 32) + (RCC_AHBENR_GPIODEN_BIT * 4))

#define RCC_AHBENR_GPIOEEN_BIT    4
#define RCC_AHBENR_GPIOEEN_BB    (PERIPH_BB_BASE + (RCC_AHBENR_OFFSET * 32) + (RCC_AHBENR_GPIOEEN_BIT * 4))

#define RCC_AHBENR_GPIOHEN_BIT    5
#define RCC_AHBENR_GPIOHEN_BB    (PERIPH_BB_BASE + (RCC_AHBENR_OFFSET * 32) + (RCC_AHBENR_GPIOHEN_BIT * 4))

#define RCC_APB1ENR_OFFSET       (RCC_OFFSET + 0x24)
#define RCC_APB1ENR_PWREN_BIT     28
#define RCC_APB1ENR_PWREN_BB     (PERIPH_BB_BASE + (RCC_APB1ENR_OFFSET * 32) + (RCC_APB1ENR_PWREN_BIT * 4))

#define RCC_APB1ENR_USART2EN_BIT  17
#define RCC_APB1ENR_USART2EN_BB  (PERIPH_BB_BASE + (RCC_APB1ENR_OFFSET * 32) + (RCC_APB1ENR_USART2EN_BIT * 4))

#define RCC_APB2ENR_OFFSET       (RCC_OFFSET + 0x20)
#define RCC_APB2ENR_SYSCFGEN_BIT  0
#define RCC_APB2ENR_SYSCFGEN_BB  (PERIPH_BB_BASE + (RCC_APB2ENR_OFFSET * 32) + (RCC_APB2ENR_SYSCFGEN_BIT * 4))


/* Exported functions ------------------------------------------------------- */
void FLASH_Config(void);
void RCC_Config(void);
void RCC_SwitchTo4MHz(void);
void RCC_SwitchTo16MHz(void);

#endif /* __RCC_H */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
